TSMC’s superior packaging capacity totally booked for the next two years
Top Stories Tamfitronics TSMC aims to promote mass production of the second technology of 3nm chips (N3E process) in 2024. Credit: TSMCNvidia and AMD acquire secured TSMC’s superior packaging capacity for Chip-on-Wafer-on-Substrate (CoWoS) and Draw-on-Integrated-Chip (SoIC) applied sciences for the next two years as they specialize in the high-efficiency computing (HPC) market, per Taiwanese media outlet Economic Day-to-day Info. HPC’s computational strength is important for AI responsibilities, with TSMC expecting earnings from AI processors to bigger than double this 12 months. TSMC predicts that the compound annual development rate of AI chips over the next 5 years will attain 50%, accounting for over 20% of the chip foundry’s earnings by 2028. World cloud service providers Amazon AWS, Microsoft, Google, and Meta are actively spicy in the AI server flee, leading to a high quiz for...
